发明名称 LATER STAGE READ PORT REDUCTION
摘要 In some implementations, a register file has a plurality of read ports for providing data to a micro-operation during execution of the micro-operation. For example, the micro-operation may utilize at least two data sources, with at least one first data source being utilized at least one pipeline stage earlier than at least one second data source. A number of register file read ports may be allocated for executing the micro-operation. A bypass calculation is performed during a first pipeline stage to detect whether the at least one second data source is available from a bypass network. During a subsequent second pipeline stage, when the at least one second data source is detected to be available from the bypass network, the number of the read ports allocated to the micro-operation may be reduced.
申请公布号 US2013339689(A1) 申请公布日期 2013.12.19
申请号 US201113993546 申请日期 2011.12.29
申请人 SRINIVASAN SRIKANTH T.;LAI CHIA YIN KEVIN;SUTANTO BAMBANG;HANCOCK CHAD D. 发明人 SRINIVASAN SRIKANTH T.;LAI CHIA YIN KEVIN;SUTANTO BAMBANG;HANCOCK CHAD D.
分类号 G06F9/38 主分类号 G06F9/38
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