发明名称 VIRTUAL MULTI-PROCESSOR SYSTEM, CONTROL METHOD FOR VIRTUAL MULTI-PROCESSOR AND CONTROL PROGRAM FOR VIRTUAL MULTI-PROCESSOR
摘要 PROBLEM TO BE SOLVED: To provide a virtual multi-processor system, a control program thereof and a control method of the virtual multi-processor for suppressing resources for debug, and for almost simultaneously performing the debug processing of a plurality of virtual processors.SOLUTION: A virtual multi-processor system 200 includes: a physical processor 210 to which a plurality of virtual processors are allocated by time-division; and a register 220 to be commonly used by the virtual processors. Each virtual processor includes a user mode in which a user program is executable, a first debug mode in which the processing of the user program is not executed and a second debug mode in which debug processing is executable, and in accordance with a first trigger, the user mode is shifted to the first debug mode. In accordance with a second trigger to be validated when the number of the virtual processors in the second debug mode does not exceed the number of the register 220, the first debug mode is shifted to the second debug mode, and the state information of the virtual processors is stored in the register 220.
申请公布号 JP2013254318(A) 申请公布日期 2013.12.19
申请号 JP20120128995 申请日期 2012.06.06
申请人 RENESAS ELECTRONICS CORP 发明人 MATSUKAWA KAZUYA
分类号 G06F11/28;G06F9/46 主分类号 G06F11/28
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