| 摘要 |
The CPU includes: a data transmission instruction output processor; a failure detection signal input processor to which a failure detection signal is input from a failure detection processor for detecting a failure of an input unit; a data storage memory for, each time an input data update processor of the input unit updates data, storing the updated data; and a CPU operation processor for obtaining input data from the data storage memory and obtaining a detection signal from the failure detection signal input processor to perform operation processing. The CPU operation processor obtains periodic data as of an amount of time given by the following expression ago: {ROUNDUP(T22/T1)}×T1 where T22 is the failure detection processing time of the failure detection processor, T1 is the data transmission instruction output period of the data transmission instruction output processor, and ROUNDUP is a function of rounding up to the nearest integer. |
