发明名称 |
TWO POINT MODULATION DIGITAL PHASE LOCKED LOOP |
摘要 |
A two point modulation digital phase locked loop circuit is disclosed. The circuit includes a sampling clock input that is switchable between a plurality of frequencies. The circuit also includes a sigma-delta modulator in a feedback path that receives low-pass modulation data. The circuit also includes a voltage-mode digital-to-analog converter (VDAC) that receives high-pass modulation data. The circuit also includes an analog voltage controlled oscillator coupled to the feedback path and the output of the VDAC. The circuit also includes a phase-to-digital converter (PDC) coupled to the feedback path, the sampling clock and a loop filter. |
申请公布号 |
EP2673931(A1) |
申请公布日期 |
2013.12.18 |
申请号 |
EP20120704358 |
申请日期 |
2012.02.08 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
LEUNG, LAI KAN;NARATHONG, CHIEWCHARN |
分类号 |
H04L27/20;H03C3/09 |
主分类号 |
H04L27/20 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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