A CMOS DIFFERENTIAL LOGIC CIRCUIT USING VOLTAGE BOOSTING TECHNIQUE

摘要

According to the present invention, a CMOS differential logic circuit using a voltage boosting technique is disclosed. The CMOS differential logic circuit comprises: a pre-charge differential logic part which receives power supply voltage to be pre-charged in response to a clock signal, and receives boosting voltage to output voltage to improve load drive capability; a voltage boosting part which receives ground voltage to be pulled down in response to the clock signal, and boosts the pull-down voltage by capacitive-coupling to the output boosting voltage; and a switching unit which connects the pre-charge differential logic part and the voltage boosting part in response to the clock signal. According to the present invention, the energy efficiency can be improved while enhancing the operating speed by reducing the delay of the transmission signal from an input terminal of the circuit to an output terminal thereof in a low power supply voltage environment and increasing the switching speed of the circuit.