| 摘要 |
A semiconductor device including a terminal configured to receive data strobe signals from a memory in an adjustment mode, a strobe value retrieve unit coupled to the terminal to latch the data strobe signals at a plurality of different timings in the adjustment mode, and an adjustment circuit configured to determine in the adjustment mode when to make a data strobe signal valid in a normal operation mode, based on latch results at the plurality of the different timings. |
