发明名称 |
Interface circuit for memory system used in computing system, has frame detection circuit that detects frame signal at one of output terminals of primary output terminals |
摘要 |
<p>The interface circuit (10) has deserializer (100) with serial input terminal (SI) for receiving serial signal (SR) including frame start code, and primary output terminals (PO1-POk) for outputting parallel signals based on received serial signal. One of parallel signals (RP1-RPk) is frame signal (BT) including frame start code. A frame detection circuit detects frame signal at one of output terminals of the primary output terminals. The matching block circuit (400) matches input terminals (MI1-MIk) to secondary output terminals (MO1-MOk) based on detection of frame detection circuit. Independent claims are included for the following: (1) method for interfacing signals transferred between devices; (2) memory system; and (3) apparatus for interfacing signals transferred between devices.</p> |
申请公布号 |
DE102013105706(A1) |
申请公布日期 |
2013.12.12 |
申请号 |
DE201310105706 |
申请日期 |
2013.06.04 |
申请人 |
SAMSUNG ELECTRONICS CO. LTD. |
发明人 |
SHIN, HYUN-SUNG |
分类号 |
G06F13/38;G06F13/00;G06F13/42 |
主分类号 |
G06F13/38 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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