发明名称 |
POWER-GATED MEMORY DEVICE WITH POWER STATE INDICATION |
摘要 |
A memory device comprises one or more power gates and state signaling circuitry. Each of the one or more power gates is configurable such that a respective portion of the memory device is powered down. The state signaling circuitry is operative to produce a power state output signal indicative of when the one or more power gates are configured such that the memory device is fully powered up. |
申请公布号 |
US2013332763(A1) |
申请公布日期 |
2013.12.12 |
申请号 |
US201213493081 |
申请日期 |
2012.06.11 |
申请人 |
PALANIAPPAN SATHAPPAN;MEHTA ROMESHKUMAR;TIRTHDASANI DHARMESH;LSI CORPORATION |
发明人 |
PALANIAPPAN SATHAPPAN;MEHTA ROMESHKUMAR;TIRTHDASANI DHARMESH |
分类号 |
G06F1/32 |
主分类号 |
G06F1/32 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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