发明名称 CPU OF PLC AND RECORDING MEDIUM STORING A SYSTEM PROGRAM FOR PLC
摘要 A microprocessor controls at least one of a first communication circuit and a second communication circuit such that a first input/output process and a second input/output process are executed in parallel. The first input/output process includes a process outputting output data from a first transfer buffer, through the first communication circuit, to a first instrument in a PLC system bus, and a process inputting input data from the first instrument, through the first communication circuit, to the first transfer buffer. The second input/output process includes a process outputting output data from a second transfer buffer, through the second communication circuit, to a second instrument in a field network, and a process inputting input data from the second instrument, through the second communication circuit, to the second transfer buffer.
申请公布号 EP2672345(A1) 申请公布日期 2013.12.11
申请号 EP20110860722 申请日期 2011.03.22
申请人 OMRON CORPORATION 发明人 NISHIYAMA, YOSHIHIDE;HAMASAKI, OSAMU;EGUCHI, SHIGEYUKI
分类号 G05B19/05;G06F13/38;H03K19/00 主分类号 G05B19/05
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