发明名称 Method for creating a 3D stacked multichip module
摘要 A 3D stacked multichip module comprises a stack of W IC dies. Each die has a patterned conductor layer, including an electrical contact region with a plurality of pads and device circuitry over a substrate. The pads of the stacked dies are aligned. Electrical connectors extend into the stack to contact pads of the dies to create a 3D stacked multichip module. The electrical connectors pass through vertical vias in the electrical contact regions. The pads may be arranged in a stair stepped arrangement. The stacked multichip module may be made using a set of N etch masks with 2 N-1 being less than W and 2 N being greater than or equal to W.
申请公布号 EP2672511(A1) 申请公布日期 2013.12.11
申请号 EP20120170759 申请日期 2012.06.04
申请人 MACRONIX INTERNATIONAL CO., LTD. 发明人 CHEN, SHIH-HUNG
分类号 H01L21/98;H01L21/768;H01L25/065 主分类号 H01L21/98
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