The present invention relates to a multi-chip package type semiconductor device which performs a function for adjusting data output timing in order to normally output output data from multiple embedded semiconductor devices without being overlapped. A semiconductor device according to the present invention comprises: a first embedded semiconductor device for outputting a common clock signal generated by delaying and fixating an external clock signal; a common clock input unit for receiving the common clock signal; and a second embedded semiconductor device including an internal clock generating unit for reflecting a delay amount generated while the common clock signal is delivered from the first embedded semiconductor device and generating an internal clock signal; wherein the second embedded semiconductor device comprises a matching detection unit for controlling the internal clock generating unit according to whether the common clock signal outputted from the first embedded semiconductor device and the internal clock signal are matched or not and a rematching control unit for controlling the matching detection unit according to a change in temperature. [Reference numerals] (1100) External clock input unit;(1200) Variable delay unit;(1300) Internal clock path;(1400) Common clock input unit;(1510) First delay copying unit;(1520) Second delay copying unit;(1610) First phase comparing unit;(1620) Second phase comparing unit;(1630) Selecting unit;(1710) Data output unit;(1720) Common clock output unit;(1800) Matching detection unit;(1900) Rematching control unit
申请公布号
KR20130134522(A)
申请公布日期
2013.12.10
申请号
KR20120058096
申请日期
2012.05.31
申请人
SK HYNIX INC.;KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATION
发明人
KWON, DAE HAN;KIM, CHUL WOO;LEE, HYUN WOO;LIM, SOO BIN