发明名称 Error-correction decoder employing check-node message averaging
摘要 In one embodiment, an LDPC decoder has a controller and one or more check-node units (CNUs). Each CNU is selectively configurable to operate in (i) a first mode that updates check-node (i.e., R) messages without averaging and (ii) a second mode that that updates R messages using averaging. Initially, each CNU is configured in the first mode to generate non-averaged R messages, and the decoder attempts to recover an LDPC-encoded codeword using the non-averaged R messages. If the decoder is unable to recover the correct codeword, then (i) the controller selects the averaging mode, (ii) each CNU is configured to operate in the second mode to generate averaged R messages, and (iii) the decoder attempts to recover the correct codeword using the averaged R messages. Averaging the R messages may slow down the propagation of erroneous messages that lead the decoder to convergence on trapping sets.
申请公布号 US8607115(B2) 申请公布日期 2013.12.10
申请号 US20090475786 申请日期 2009.06.01
申请人 GUNNAM KIRAN;YANG SHAOHUA;XU CHANGYOU;LSI CORPORATION 发明人 GUNNAM KIRAN;YANG SHAOHUA;XU CHANGYOU
分类号 H03M13/00 主分类号 H03M13/00
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