发明名称 |
Power supply voltage monitoring circuit and electronic circuit including the power supply voltage monitoring circuit |
摘要 |
Provided is a power supply voltage monitoring circuit (50) including: a signal output circuit (1) for outputting a signal voltage (Vsignal) which exhibits a saturation characteristic with respect to an increase in a power supply voltage (VDD); and a signal voltage monitoring circuit (4) for comparing the power supply voltage (VDD) with the signal voltage (Vsignal), and outputting a signal (Vout) indicating that the signal voltage (Vsignal) is normal when there is a predetermined voltage difference. With this configuration, a minimum operating power supply voltage may be reduced in an electronic circuit, and the power supply voltage may be used with efficiency. |
申请公布号 |
US8604821(B2) |
申请公布日期 |
2013.12.10 |
申请号 |
US20100686684 |
申请日期 |
2010.01.13 |
申请人 |
SUGIURA MASAKAZU;IGARASHI ATSUSHI;SEIKO INSTRUMENTS INC. |
发明人 |
SUGIURA MASAKAZU;IGARASHI ATSUSHI |
分类号 |
G01R31/40 |
主分类号 |
G01R31/40 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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