发明名称 Non-volatile semiconductor memory device for suppressing deterioration in junction breakdown voltage and surface breakdown voltage of transistor
摘要 According to one embodiment, a non-volatile semiconductor memory device includes a plurality of memory cells and a transistor. The transistor includes a gate insulating film, a gate electrode on the gate insulating film, a sidewall insulating film on both side surfaces of the gate electrode, a source diffusion layer corresponding to the sidewall insulating film, a first hollow formed in a position at a height less than a bottom surface of the gate insulating film directly below an outer side surface of the sidewall insulating film of another side of the gate electrode, a second hollow formed in the first hollow at a position at a height less than the first hollow, and a drain diffusion layer corresponding to another side of the gate electrode and including a low-concentration drain region formed on a bottom surface of the second hollow and a high-concentration drain region.
申请公布号 US8604517(B2) 申请公布日期 2013.12.10
申请号 US201113234613 申请日期 2011.09.16
申请人 NOGUCHI MITSUHIRO;KUTSUKAKE HIROYUKI;ENDO MASATO;KABUSHIKI KAISHA TOSHIBA 发明人 NOGUCHI MITSUHIRO;KUTSUKAKE HIROYUKI;ENDO MASATO
分类号 H01L29/66 主分类号 H01L29/66
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