发明名称 I-R voltage drop screening when executing a memory built-in self test
摘要 A built-in self test (BIST) method and system for testing a memory included on an integrated circuit includes activating a component of the integrated circuit, partitioning the memory into a first part for use by non-BIST components and second part for BIST, and executing BIST on the second part of the memory while the component is operating. While the BIST is executing, the non-BIST components can access the first part of the memory and perform normal functional operations. The BIST method and system finds memory faults that are related to an I-R voltage drop due to the physical placement of the memory relative to power supply sources.
申请公布号 US8607110(B1) 申请公布日期 2013.12.10
申请号 US201213721397 申请日期 2012.12.20
申请人 MARVELL INTERNATIONAL LTD. 发明人 PENG HSUI-PENG;LEE JAE-HONG
分类号 G01R31/28;G11C29/00 主分类号 G01R31/28
代理机构 代理人
主权项
地址