发明名称 Calibrating timing, gain and bandwidth mismatch in interleaved ADCs
摘要 A method and a corresponding device for calibrating an interleaved analog-to-digital converter (ADC) involve injecting a randomly determined amount of dither into at least one of a flash component and a multiplying digital-to-analog converter (MDAC) in a selected channel in the ADC. A correlation procedure is performed to estimate, based on an overall ADC output, a gain experienced by the injected dither after propagating through the channel. The injection and the correlation procedure are repeated on at least one additional channel to estimate a gain for each at least one additional channel. The estimated gains of the selected channel and the at least one additional channel are then compared to determine a degree of mismatch between the selected channel and each at least one additional channel. At least one channel is calibrated as a function of the determined degree of mismatch.
申请公布号 US8604953(B2) 申请公布日期 2013.12.10
申请号 US201213596626 申请日期 2012.08.28
申请人 ALI AHMED MOHAMED ABDELATTY;ANALOG DEVICES, INC. 发明人 ALI AHMED MOHAMED ABDELATTY
分类号 H03M1/10 主分类号 H03M1/10
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