RAMP GENERATOR CIRCUIT AND SOLID-STATE IMAGING DEVICE

摘要

A ramp generator circuit (27) is provided with: a reference signal generation circuit (3) for generating a ramp waveform having an incline squared in accordance with the higher-order bit value of a gain control signal; a clock control circuit (6) which, when the gain is set to negative, selectively outputs 2^m types of divided clocks corresponding to division areas obtained by separating the code range represented by a lower-order bit into 2^m areas (where m is a natural number); a variable gain circuit (2) for setting the start voltage and the end voltage for the ramp waveform according to the gain control signal value and, when the gain has been set to negative, setting the ramp signal amplitude of each of the division areas so that equal values are assumed by the ratio of ramp driving clock periods between adjacent division areas and by the ratio of the ramp signal amplitude at a standard gain setting and of the maximum ramp signal amplitude in each of the division areas; and an attenuator (4) for setting the attenuation ratio.