发明名称 FAILURE DETECTION SYSTEM AND METHOD, AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a system that expands the range of failure detection for internal states of a processor so as to shorten time from the occurrence of a failure to the detection of the failure.SOLUTION: A failure detection system includes: JTAG-compliant first and second processors (101A and 101B); and a processor monitoring JTAG controller (105) that generates JTAG signals for monitoring the processors during normal operation and that commonly and parallelly inputs monitoring TDI-signals to the first and second processors (101A and 101B); and a TDO signal comparison circuit (103) that receives TDO signals that are parallelly output from the first and second processors (101A and 101B), compares them with each other and, if a mismatch is detected, brings a processor failure notification signal into an active state.
申请公布号 JP2013242746(A) 申请公布日期 2013.12.05
申请号 JP20120116221 申请日期 2012.05.22
申请人 NEC COMMUN SYST LTD 发明人 GOTO MORITAKA
分类号 G06F11/18 主分类号 G06F11/18
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