| 摘要 |
A single poly EEPROM (Electrically Erasable Programmable Read Only Memory), which may include at least one of the following: (1) A second conductive type well formed on and/or over a semiconductor substrate. (2) A first conductive type source and drain regions formed in the second conductive type well. The single poly EEPROM may include at least one of: (a) A tunnel oxide layer formed on and/or over the second conductive type well. (b) A floating gate formed on and/or over the tunnel oxide layer and doped with second conductive type impurity ions. (c) A first conductive type impurity region formed in the second conductive type well adjacent to the floating gate. The floating gate may be configured such that a concentration of a region of the floating gate adjacent to the drain region is higher than that of the other region of the floating gate adjacent to the impurity region. |
