发明名称 SEMICONDUCTOR MEMORY DEVICE, AND METHOD OF CONTROLLING THE SAME
摘要 A semiconductor device includes a memory core with a plurality of memory cells, an internal voltage generator and a low power entry circuit. The low power entry circuit receives a plurality of control signals which are provided to a command decoder, and generates a low power signal indicating a low power consumption mode where a refresh operation is prohibited. The internal voltage generator includes a detector and at least one of booster circuits. The internal voltage generator, coupled to the memory core via an internal power supply line, generates a boosted internal voltage based on an external voltage and supplies the boosted internal voltage to the memory core via the internal power supply line. The internal voltage generator stops supplying the boosted internal voltage to the internal power supply line in response to the low power signal while the external voltage is supplied to the semiconductor device.
申请公布号 US2013326246(A1) 申请公布日期 2013.12.05
申请号 US201313960612 申请日期 2013.08.06
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 FUJIOKA SHINYA;KAWAKUBO TOMOHIRO;NISHIMURA KOICHI;SATO KOTOKU
分类号 G11C5/14;G06F1/26;G06F1/32;G11C11/406;H02M3/07 主分类号 G11C5/14
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