| 摘要 |
PURPOSE: A time-domain comparison apparatus using an input offset compensation technique is provided to secure the time delay difference by forming a delay line of a voltage control delay converting unit into two stages for easily removing the analog noise. CONSTITUTION: A time-domain comparison unit (100) includes a voltage control delay converting unit, a time amplifier, and an electronic magazine phase detection unit. The voltage control delay converting unit receives a first input signal, a second input signal, and a clock signal, and outputs a first output signal and a second output signal. The time amplifier receives the first and second output signals, and outputs a third output signal and a fourth output signal. The electronic magazine phase detection unit receives the third and fourth output signals, and outputs a fifth output signal and a sixth output signal. A finite-state machine unit (200) receives the fifth and sixth output signals, and outputs a first output bus. [Reference numerals] (AA) First output bus; (BB) First input signal; (CC) Fifth output signal; (DD) Clock signal; (EE) Sixth output signal; (FF) Second input signal |
