发明名称 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
摘要 <p>The present invention provides a semiconductor package including an accurate through line with a low process defect, and a method for manufacturing the same. According to one embodiment of the present invention, the semiconductor package includes an insulating substrate including a first through part and a second through part; a through line penetrating the insulating substrate; an upper pad electrically connected to the upper part of the through line and located on the upper surface of the insulating layer; a lower pad electrically connected to the lower part of the through line and located on the lower surface of the insulating substrate; a semiconductor chip electrically connected to the through line and located in the second through part; a molding member molding the insulating substrate and having a firs side covered by the insulating substrate and a second side exposed from the insulating substrate; and a redistribution pattern layer electrically connected to the semiconductor chip and the through line and located on the lower part of the insulating substrate.</p>
申请公布号 KR20130132163(A) 申请公布日期 2013.12.04
申请号 KR20120056342 申请日期 2012.05.25
申请人 NEPES CO., LTD. 发明人 KIM, JONG HEON;KWON, YONG TAE
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
主权项
地址