| 摘要 |
Provided in the present invention is a semiconductor device comprising: a read pulse width selector for, if a read signal is inputted, generating a read selection pulse which varies the pulse width in response to a test synchronization signal and a test read signal; a write pulse width selector for, if a write signal is inputted, generating a write selection pulse which varies the pulse width in response to a test write signal and the test synchronization signal; and a column selection signal generator for decoding an address in a pulse width section of the read selection pulse or the write selection pulse, and generating a column selection signal. [Reference numerals] (110) Read pulse generator;(120) Read pulse width adjustor;(210) Write pulse generator;(220) Write pulse width adjustor;(300) Column selection signal generator |
