发明名称 SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME
摘要 <p>The present invention provides a method for manufacturing a semiconductor package including accurate through wiring with a low process defect. According to one embodiment of the present invention, the semiconductor package includes an insulating substrate including a first through part and a second through part; through wiring charging the first through part and penetrating the insulating substrate; a semiconductor chip electrically connected to the through wiring and located in the second through part; a molding member having a recess region exposing the uppermost part of the through wiring and molding the insulating substrate and the semiconductor chip; a rewiring pattern layer electrically connecting the semiconductor chip and the through wiring and located on the lower part of the insulating substrate; and an external connection member electrically connected to the rewiring pattern layer.</p>
申请公布号 KR20130132162(A) 申请公布日期 2013.12.04
申请号 KR20120056341 申请日期 2012.05.25
申请人 NEPES CO., LTD. 发明人 KWON, YONG TAE;PARK, KYUNG HOON
分类号 H01L23/48 主分类号 H01L23/48
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