发明名称 |
Debugging port security interface |
摘要 |
The present invention provides a secure JTAG interface to an application-specific integrated circuit (ASIC). In the preferred embodiment the invention operates through the combined efforts of a Security Module (SM) comprising a state machine that controls the security modes for the ASIC, and a Test Control Module (TCM) which contains the JTAG interface. The TCM operates in either a restricted mode or an unrestricted mode, depending on the state of the SM state machine. In a restricted mode, only limited access to memory content is permitted. In an unrestricted mode, full access to memory content is permitted. |
申请公布号 |
US8601279(B2) |
申请公布日期 |
2013.12.03 |
申请号 |
US201213542815 |
申请日期 |
2012.07.06 |
申请人 |
LITTLE HERBERT A.;RANDELL JERROLD R.;MADTER RICHARD C.;HICKEY RYAN J.;BLACKBERRY LIMITED |
发明人 |
LITTLE HERBERT A.;RANDELL JERROLD R.;MADTER RICHARD C.;HICKEY RYAN J. |
分类号 |
G06F21/00;G06F11/36;G06F12/14;H04L9/00 |
主分类号 |
G06F21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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