| 摘要 |
PURPOSE: A high-speed, low-complexity Radix-two to the fifth FFT(Fast Fourier Transform) device and method are provided to increase a data processing rate by calculating a part of an upper stage in parallel in a pipelined FFT device having multiple parallel data paths. CONSTITUTION: An FFT device is a pipelined FFT device having eight parallel data paths, and can include an FFT part(310) and a post-processing part(320). The FFT part can process input data received through the eight parallel data paths with 64 point SDF(Single-path Delay Feedback) operations and perform an FFT operation. The FFT part can independently calculate the input data received through the parallel data paths in parallel by using a first FFT part(311) through an eighth FFT part(312). The post-processing part performs bottom three stages with a first butterfly calculation part, a second butterfly calculation part, and a complex constant multiplier(322) for the multiplication of W16 rotation factors, and can post-process the output of the first FFT part through eighth FFT part. [Reference numerals] (311) First FFT part; (312) Eighth FFT part; (321,324) First butterfly calculation part; (323) Second butterfly calculation part; (AA) Second FFT part; (BB) Third FFT part; (CC) Fourth FFT part; (DD) Fifth FFT part; (EE) Sixth FFT part; (FF) Seventh FFT part |
