发明名称 SPACER FOR ENHANCING VIA PATTERN OVERLAY TOLERENCE
摘要 After formation of line openings in a hard mask layer, hard mask level spacers are formed on sidewalls of the hard mask layer. A photoresist is applied and patterned to form a via pattern including a via opening. The overlay tolerance for printing the via pattern is increased by the lateral thickness of the hard mask level spacers. A portion of a dielectric material layer is patterned to form a via cavity pattern by an etch that employs the hard mask layer and the hard mask level spacers as etch masks. The hard mask level spacers are subsequently removed, and the pattern of the line is subsequently transferred into an upper portion of the dielectric material layer, while the via cavity pattern is transferred to a lower portion of the dielectric material layer.
申请公布号 US2013313717(A1) 申请公布日期 2013.11.28
申请号 US201213479893 申请日期 2012.05.24
申请人 HOLMES STEVEN J.;HORAK DAVID V.;KOBURGER, III CHARLES W.;PONOTH SHOM;YANG CHIH-CHAO;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 HOLMES STEVEN J.;HORAK DAVID V.;KOBURGER, III CHARLES W.;PONOTH SHOM;YANG CHIH-CHAO
分类号 H01L23/48;H01L21/768 主分类号 H01L23/48
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