发明名称 OFFSETTING CLOCK PACKAGE PINS IN A CLAMSHELL TOPOLOGY TO IMPROVE SIGNAL INTEGRITY
摘要 The disclosed embodiments relate to the design of a memory system which includes a set of one or more memory modules, wherein each memory module in the set has a clamshell configuration, wherein pairs of opposing memory packages containing memory chips are located on opposite sides of the memory module. The memory system also includes a multi-drop path containing signal lines which pass through the set of memory modules, and are coupled to memory packages in the set of memory modules. For a given signal line in the multi-drop path, a first memory package and a second memory package that comprise a given pair of opposing memory packages are coupled to the given signal line at a first location and a second location, respectively, wherein the first location and the second location are separated from each other by a distance d1 along the given signal line.
申请公布号 US2013314968(A1) 申请公布日期 2013.11.28
申请号 US201213983998 申请日期 2012.02.07
申请人 SHAEFFER IAN;KOLLIPARA RAVINDRANATH 发明人 SHAEFFER IAN;KOLLIPARA RAVINDRANATH
分类号 G11C5/02;H01L23/48 主分类号 G11C5/02
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