发明名称 CMOS TRANSISTOR LINEARIZATION METHOD
摘要 A circuit for sampling an analog input signal may include a transistor disposed on a substrate and a sampling capacitor coupled to one of the source and the drain of the transistor. The transistor may be disposed on a substrate that is coupled to ground. A source and a drain of the transistor may be disposed in a back gate of the transistor. The analog input may be supplied to one of the source and the drain of the transistor, and the back gate may receive a back gate voltage having a value that is lower than ground.
申请公布号 US2013314128(A1) 申请公布日期 2013.11.28
申请号 US201213477838 申请日期 2012.05.22
申请人 HENSLEY JOSEPH M.;MURDEN FRANKLIN M.;ANALOG DEVICES, INC. 发明人 HENSLEY JOSEPH M.;MURDEN FRANKLIN M.
分类号 H03K5/153;G05F3/02;H03K17/687 主分类号 H03K5/153
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