发明名称 MULTI-CORE PROCESSOR SYSTEM, MEMORY CONTROLLER CONTROL METHOD AND MEMORY CONTROLLER CONTROL PROGRAM
摘要 A multi-core processor system includes a memory controller that includes multiple ports and shared memory that includes physical address spaces divided among the ports. A CPU acquires from a parallel degree information table using an acquiring unit, the number of CPUs to which software that is to be executed by the multi-core processor system, is to be assigned. After this acquisition, the CPU uses a determining unit to determine the CPUs to which the software to be executed is to be assigned and uses a setting unit to set for each CPU, physical address spaces corresponding to logical address spaces defined by the software to be executed. After this setting, the CPU notifies an address converter of the addresses and notifies the software to be executed of the start of execution.
申请公布号 EP2551769(A4) 申请公布日期 2013.11.27
申请号 EP20100848406 申请日期 2010.03.25
申请人 FUJITSU LIMITED 发明人 YAMASHITA, KOICHIRO;HAYAKAWA, FUMIHIKO
分类号 G06F9/50 主分类号 G06F9/50
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