| 摘要 |
An input buffer according to an example of the present invention includes a first buffer circuit outputting, buffering, and amplifying a first input signal and a second input signal, a second buffer circuit generating a common mode output signal by composing a replica circuit of the first circuit and inputting the first input signal, and a detector comparing the common mode output signal to a reference output signal and controlling the first and second buffer circuits so that a level of the common mode output signal is matched with a level of the reference output signal. [Reference numerals] (AA) n |
