发明名称
摘要 An array substrate includes: a gate line, a data line crossing disposed substantially perpendicular to the gate line, a first switching element being electrically connected to the gate line and the data line, a pixel electrode being electrically connected to the first switching element to be formed in a pixel area, the pixel electrode having including an opening pattern, and a light-blocking wiring formed disposed in correspondence with the opening pattern is formed, the light-blocking wiring including a convex-concave pattern.
申请公布号 JP5355952(B2) 申请公布日期 2013.11.27
申请号 JP20080194457 申请日期 2008.07.29
申请人 发明人
分类号 G02F1/1343;G02F1/1335;G02F1/1368;G09F9/30;H01L21/336;H01L29/786 主分类号 G02F1/1343
代理机构 代理人
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