| 摘要 |
<p>The digital filter (30) has parallelization block (32) for splitting input signal to parallel raw signals. An integrating block (34) converts parallel raw signals into intermediate signal. A differentiation block (16a,16b) generates output signal by differentiating intermediate signal. The integrating block has logic block (36) to carry summation operations of the parallel raw signals and to generate parallel summed signals. The integrating block has recursion block (38) to generate recursive signal from the parallel sum signals and the intermediate signal. Independent claims are included for the following: (1) radar detector for missile; and (2) method for reduction sample rate of input signal.</p> |
