发明名称 Memory apparatus operable to perform a power-saving operation
摘要 A memory apparatus includes multiple memory circuits and an interface circuit to present to a host system emulated memory circuits. The interface circuit includes a first component of a first type and a second component of a second type, the first component and the second component being operable to present a host-system interface to the host system and to present a memory-circuit interface to the plurality of memory circuits, in which there is a difference in at least one aspect between the host-system interface and the memory circuit interface. At least one of the first and second components is operable to identify one or more memory circuits that is not being accessed and to perform a power-saving operation on the one or more memory circuits identified as not being accessed, where the power-saving operation includes placing the memory circuits identified as not being accessed in a precharge power down mode.
申请公布号 US8595419(B2) 申请公布日期 2013.11.26
申请号 US201113182234 申请日期 2011.07.13
申请人 RAJAN SURESH NATARAJAN;SCHAKEL KEITH R.;SMITH MICHAEL JOHN SEBASTIAN;WANG DAVID T.;WEBER FREDERICK DANIEL;GOOGLE INC. 发明人 RAJAN SURESH NATARAJAN;SCHAKEL KEITH R.;SMITH MICHAEL JOHN SEBASTIAN;WANG DAVID T.;WEBER FREDERICK DANIEL
分类号 G06F12/00 主分类号 G06F12/00
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