发明名称 Semiconductor device and method for controlling flip-flop
摘要 A semiconductor integrated circuit includes a first retention flip-flop configured in a first type in which a retention flip-flop is able to retain data based on one of a low-level clock signal and a high-level clock signal, and unable to retain data based on another one of the low-level clock signal and high-level clock signal, and a second retention flip-flop configured in a second type in which a retention flip-flop is able to retain data based on the low-level clock signal and also able to retain data based on the high-level clock signal.
申请公布号 US8593192(B2) 申请公布日期 2013.11.26
申请号 US201213612626 申请日期 2012.09.12
申请人 ODA YASUHIRO;RENESAS ELECTRONICS CORPORATION 发明人 ODA YASUHIRO
分类号 H03K3/02;H03K17/00 主分类号 H03K3/02
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