发明名称 Ganged hardware counters for coordinated rollover and reset operations
摘要 Mechanisms for controlling rollover or reset of hardware performance counters in the data processing system. A signal indicating that a rollover or reset of a first hardware performance counter has occurred is received and it is determined if the first hardware performance counter is analytically related to one or more second hardware performance counters based on defined ganged hardware performance counter sets. A signal is sent to each of the one or more second hardware performance counters in response to a determination that the first hardware performance counter is analytically related to the one or more second hardware performance counters. Each of the one or more second hardware performance counters is reset to an initial value in response to the one or more second hardware performance counters receiving the signal from the ganged hardware performance counter rollover/reset logic.
申请公布号 US8595472(B2) 申请公布日期 2013.11.26
申请号 US20100951211 申请日期 2010.11.22
申请人 DIERKS, JR. HERMAN D.;HERRERA ANDRES;KING-SMITH BERNARD A.;LAM KIET H.;INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DIERKS, JR. HERMAN D.;HERRERA ANDRES;KING-SMITH BERNARD A.;LAM KIET H.
分类号 G06F7/38;G06F9/00;G06F9/44;G06F15/00 主分类号 G06F7/38
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