发明名称 FREQUENCY ADJUSTMENT CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide a frequency adjustment circuit in which the need for a phase difference detection circuit is eliminated, by widening the dynamic range of a current/voltage conversion signal thereby preventing false detection.SOLUTION: The frequency adjustment circuit includes a drive voltage application circuit 4 which drives an electrical apparatus such as a piezoelectric blower, a signal generation circuit 7 for generating a clock signal having a change timing when the drive voltage has a maximum amplitude, a current/voltage conversion circuit 1 which always monitors the drive voltage flowing while driving a piezoelectric element and converts the drive voltage into a first voltage, a sample and hold circuit which holds the first voltage periodically in synchronism with the clock signal, a resonance frequency detection circuit 9 which outputs a control signal, and a frequency variable oscillation circuit 3 which supplies to the drive voltage application circuit 4, an oscillation signal of a frequency set by the control signal while sweeping the drive frequency. The drive current is monitored at such a sample hold timing that the phase difference between the drive voltage and drive current becomes 0 when driving the electrical apparatus at the resonance frequency, and the drive voltage for maximizing the drive current has a maximum amplitude.
申请公布号 JP2013236439(A) 申请公布日期 2013.11.21
申请号 JP20120106531 申请日期 2012.05.08
申请人 SEIKO NPC CORP 发明人 KIMURA YOSHIO;WATANABE SATORU
分类号 H02N2/00 主分类号 H02N2/00
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