发明名称 PROGRAMMABLE CIRCUIT, RELATED COMPUTING MACHINE, AND METHOD
摘要 PROBLEM TO BE SOLVED: To provide a new computing architecture based on a pipeline.SOLUTION: A programmable circuit receives configuration data from an external source, stores the firmware in a memory, and then downloads the firmware from the memory. Such a programmable circuit allows eliminating the need for manually reprogramming the configuration memory, such as a computing machine. If the programmable circuit is an FPGA that is part of a pipeline accelerator, a processor coupled to the accelerator searches a firmware that represents the configuration, sends the firmware to the FPGA, and then the FPGA stores the firmware in a memory such as an electrically erasable and programmable read-only memory (EEPROM). Next, the FPGA downloads the firmware from the memory into its configuration registers, and thus reconfigures itself.
申请公布号 JP2013236380(A) 申请公布日期 2013.11.21
申请号 JP20130107858 申请日期 2013.05.22
申请人 LOCKHEED MARTIN CORP 发明人 RAPP JOHN W;JACKSON LARRY;JONES MARK;CHERASARO TROY
分类号 H03K19/173;G06F3/00;G06F3/02;G06F5/00;G06F9/38;G06F11/00;G06F13/00;G06F15/00;G06F15/80;G09G5/00;G11C5/00;G11C7/00;G11C11/22 主分类号 H03K19/173
代理机构 代理人
主权项
地址