APPARATUS AND METHOD FOR REDUCED PEAK POWER CONSUMPTION DURING COMMON OPERATION OF MULTI-NAND FLASH MEMORY DEVICES

摘要

System and method for executing a global memory command in a multi-chip non-volatile memory device having a plurality of non-volatile memories. The global memory command is received at each non-volatile memory concurrently. The memory command is initiated at different times relative to receiving the global memory command for at least two of the plurality of non-volatile memory to mitigate peak power consumption.