发明名称 MICROELECTRONIC PACKAGE UTILIZING MULTIPLE BUMPLESS BUILD-UP STRUCTURES AND THROUGH-SILICON VIAS
摘要 A microelectronic package having a first bumpless build-up layer structure adjacent an active surface and sides of a microelectronic device and a second bumpless build-up layer structure adjacent a back surface of the microelectronic device, wherein conductive routes are formed through the first bumpless build-up layer from the microelectronic device active surface to conductive routes in the second bumpless build-up layer structure and wherein through-silicon vias adjacent the microelectronic device back surface and extending into the microelectronic device are electrically connected to the second bumpless build-up layer structure conductive routes.
申请公布号 WO2013172814(A1) 申请公布日期 2013.11.21
申请号 WO2012US37787 申请日期 2012.05.14
申请人 INTEL CORPORATION;GOH, ENG HUAT;TEOH, HOAY TIEN 发明人 GOH, ENG HUAT;TEOH, HOAY TIEN
分类号 H01L23/48;H01L25/065 主分类号 H01L23/48
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