发明名称 Method for producing a substrate with various active areas and planar and three-dimensional transistors
摘要 The method involves arranging a protective mask between a semi-conductor material layer (2) and a first etching mask, and passing an insulation pattern (4) through the semi-conductor material layer. Lateral spacers are formed on lateral surfaces of the etching mask so as to form a second etching mask. The semi-conductor material layer is etched by the second etching mask so as to form a pattern made from semi-conductor material in an area, where another area of the semi-conductor material layer is protected by a third etching mask (1).
申请公布号 EP2665086(A1) 申请公布日期 2013.11.20
申请号 EP20130354016 申请日期 2013.05.15
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIESALTERNATIVES 发明人 ANDRIEU, FRANCOIS;BARNOLA, SEBASTIEN;BELLEDENT, JEROME
分类号 H01L21/033;H01L21/308;H01L21/8234 主分类号 H01L21/033
代理机构 代理人
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