发明名称 MEMORY CONTROLLER AND INFORMATION PROCESSING DEVICE
摘要 <p>A memory controller includes: a determination part configured to determine a type of a DIMM having a different address line topology based on SPD; a slew rate setting part configured to set a slew rate of an address signal based on the type of the DIMM determined by the determination part; and a delay setting part configured to set a data delay amount when reading/writing data.</p>
申请公布号 EP2664991(A1) 申请公布日期 2013.11.20
申请号 EP20110855808 申请日期 2011.01.13
申请人 FUJITSU LIMITED 发明人 SAKAMAKI, HIDEYUKI;OSANO, HIDEKAZU;NAKAYAMA, HIROSHI;TAKAKU, KAZUYA;HIGETA, MASANORI
分类号 G06F12/00;G06F13/16 主分类号 G06F12/00
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