发明名称 Digital phase-locked loops and frequency adjusting methods thereof
摘要 <p>A digital phase-locked loop having a phase frequency detector (PFD), a 3-state phase frequency detection converter (3-state PFD converter), a loop filter and a digital voltage-controlled oscillator is provided. The PFD receives an input frequency and a reference frequency and outputs a first signal and a second signal based on the phase difference between the input frequency and the reference frequency. The 3-state PFD converter outputs a 3-state signal according to the first and second signals, wherein the 3-state signal is presented in 1, 0 and -I. The loop filter outputs at least one control bit based on only the 3-state signal. The DCO adjusts the outputted oscillation frequency according to the control bit.</p>
申请公布号 EP2302800(B1) 申请公布日期 2013.11.20
申请号 EP20100003775 申请日期 2010.04.08
申请人 RICHWAVE TECHNOLOGY CORP. 发明人 CHEN, TSE-PENG
分类号 H03L7/089 主分类号 H03L7/089
代理机构 代理人
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