发明名称 Memory circuits, systems, and modules for performing DRAM refresh operations and methods of operating the same
摘要 A memory module can include a plurality of dynamic memory devices that each can include a dynamic memory cell array with respective regions therein, where the plurality of dynamic memory devices can be configured to operate the respective regions responsive to a command. A DRAM management unit can be on the module and coupled to the plurality of dynamic memory devices, and can include a memory device operational parameter storage circuit that is configured to store memory device operational parameters for the respective regions to affect operation of the respective regions responsive to the command.
申请公布号 US8588017(B2) 申请公布日期 2013.11.19
申请号 US201113236972 申请日期 2011.09.20
申请人 PARK CHUL-WOO;JUN YOUNG-HYUN;CHOI JOO-SUN;HWANG HONG-SUN;SAMSUNG ELECTRONICS CO., LTD. 发明人 PARK CHUL-WOO;JUN YOUNG-HYUN;CHOI JOO-SUN;HWANG HONG-SUN
分类号 G11C29/00 主分类号 G11C29/00
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