发明名称 Process for fabricating semiconductor devices and a semiconductor device comprising a chip with through-vias
摘要 A semiconductor device includes a first wafer having at least one first integrated-circuit chip and a first support layer surrounding the first integrated circuit chip. A first electrical-connection layer is placed on a frontside of the first wafer and includes a first electrical-connection network. A second wafer is placed on a frontside of the first electrical-connection layer. The second wafer includes at least one second integrated-circuit chip and a second support layer surrounding the second integrate circuit chip. The second integrated circuit chip has an active side facing the first electrical-connection layer, and one or more through-holes filled with a conductor forming electrical-connection vias. A second electrical-connection layer is placed on the backside of the second wafer and includes a second electrical-connection network.
申请公布号 US8586450(B2) 申请公布日期 2013.11.19
申请号 US201113103191 申请日期 2011.05.09
申请人 SAUGIER ERIC;STMICROELECTRONICS (GRENOBLE 2) SAS 发明人 SAUGIER ERIC
分类号 H01L21/30 主分类号 H01L21/30
代理机构 代理人
主权项
地址
您可能感兴趣的专利