| 摘要 |
A DC-DC voltage converter having a switching stage including high- and low-side switches connected in series at a switched node across a DC voltage bus; a control circuit; and a feedback loop connected between an output of the switching stage and an input of the control circuit, the control circuit having a clock signal input and including an error processing circuit coupled to the input for detecting an output of the feedback loop, the control circuit turning OFF the low-side switch and turning ON the high-side switch when the clock signal is detected. The control circuit operates in a cycle-by-cycle operation generating PWM modulation synchronous to the external clock source.
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