发明名称 |
Top exposed package and assembly method |
摘要 |
A semiconductor package and it manufacturing method includes a lead frame having a die pad, and a source lead with substantially a V groove disposed on a top surface. A semiconductor chip disposed on the die pad. A metal plate connected to a top surface electrode of the chip having a bent extension terminated in the V groove in contact with at least one of the V groove sidewalls.
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申请公布号 |
US8586414(B2) |
申请公布日期 |
2013.11.19 |
申请号 |
US20100968159 |
申请日期 |
2010.12.14 |
申请人 |
XUE YAN XUN;HO YUEH-SE;YILMAZ HAMZA;BHALLA ANUP;LU JUN;LIU KAL;ALPHA & OMEGA SEMICONDUCTOR, INC. |
发明人 |
XUE YAN XUN;HO YUEH-SE;YILMAZ HAMZA;BHALLA ANUP;LU JUN;LIU KAL |
分类号 |
H01L21/00 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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