| 摘要 |
<p>The present invention relates to a circuit and method for generating a high-resolution PWM signal and, more specifically, to a circuit and method for generating a high-resolution PWM signal by configuring delay array corresponding to a 0.5 clock time period. The purpose of the present invention is to configure the delay array corresponding to the 0.5 clock time period in order to generate the high-resolution PWM signal, sample the generated high-resolution PWM signal into a clock signal, and measure overflow to determine whether to use a high or low section of the clock signal. Thus, the variation of time delay at a delay device can be compensated by configuring the delay array with time corresponding to 0.5 clock and continuously checking overflow. [Reference numerals] (10) Integer part pulse generating unit;(20) Decimal part pulse generating unit;(30) DUTY Cycle digitalizing unit;(31,AA) Integer part value;(32,BB) Decimal part value;(CC) PWM signal</p> |
