发明名称 CELLULE MEMOIRE SRAM A QUATRE TRANSISTORS MUNIS D'UNE CONTRE-ELECTRODE
摘要 <p>The cell has semi-conductor material zones (5a, 5b) provided with access P-type metal oxide semiconductor transistors (1a, 1b) and P-type metal oxide semiconductor driver transistors (2a, 2b), respectively. One of the access transistors and one of the driver transistors are located at a side of a plane passing through electric nodes (F, S). The other access transistor and the other driver transistor are located at another side of the plane. A support substrate has counter electrodes, where connections of the counter electrodes and gate electrodes (7a, 7b) are arranged on both sides of plane.</p>
申请公布号 FR2958077(B1) 申请公布日期 2013.11.15
申请号 FR20100001214 申请日期 2010.03.26
申请人 COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIESALTERNATIVES;STMICROELECTRONICS (CROLLES 2) SAS 发明人 THOMAS OLIVIER;FENOUILLET BERANGER CLAIRE;CORONEL PHILIPPE;DENORME STEPHANE
分类号 H01L21/8244;G11C11/412 主分类号 H01L21/8244
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