SEMICONDUCTOR MEMORY

摘要

PROBLEM TO BE SOLVED: To provide an architecture that achieves simplification of semiconductor memory operation.SOLUTION: A semiconductor memory of an embodiment includes: a buffer circuit 12 for input/output of data to a memory cell array; a data transfer circuit 17 that is connected to the buffer circuit 12 via a data bus IOBUS and transfers data of a first or second bit width; and an ECC circuit 20 that is connected to a data bus IOBUS and performs ECC processing for data of the second bit width. The buffer circuit 12 includes a pipe circuit 125 that inputs/outputs data of the first bit width. The data transfer circuit 17 includes: a data storage unit 171 that includes a plurality of latch circuits 71A and 71B holding the data of the first bit width and a selection circuit selecting one of the latch circuits 71A and 71B; and a data storage unit 172 that is connected to the ECC circuit 20 and holds the data of the second bit width.